Product Summary

The SN74LVC1G125DBVR is a single bus buffer gate with 3-state output. It is designed for 1.65V to 5.5V VCC operation. The output is disabled when the output-enable(OE) input is high. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. The SN74LVC1G125DBVR is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Parametrics

SN74LVC1G125DBVR absolute maximum ratings: (1)VCC Supply voltage range: –0.5 to 6.5 V; (2)VI Input voltage range: –0.5 to 6.5 V; (3)VO Voltage range applied to any output in the high-impedance or power-off state: –0.5 to 6.5 V; (4)VO Voltage range applied to any output in the high or low state: –0.5 to VCC + 0.5 V; (5)IIK Input clamp current VI < 0: –50 mA; (6)IOK Output clamp current VO < 0: –50 mA; (7)IO Continuous output current: ±50 mA; (8)Continuous current through VCC or GND: ±100 mA; (9)θJA Package thermal impedance DRL package: 142 ℃/W; (10)Tstg Storage temperature range: –65 to 150 ℃.

Features

SN74LVC1G125DBVR features: (1)Available in the Texas Instruments NanoFree Package; (2)Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II; (3)Supports 5-V VCC Operation; (4)ESD Protection Exceeds JESD 22: 2000-V Human-Body Model (A114-A); 200-V Machine Model (A115-A); 1000-V Charged-Device Model (C101); (5)Inputs Accept Voltages to 5.5 V; (6)Max tpd of 3.7 ns at 3.3 V; (7)Low Power Consumption, 10μA Max ICC; (8)±24-mA Output Drive at 3.3 V; (9)Ioff Supports Partial-Power-Down Mode Operation.

Diagrams

SN74LVC1G125DBVR logic diagram

Image Part No Mfg Description Data Sheet Download Pricing
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SN74LVC1G125DBVR
SN74LVC1G125DBVR

Texas Instruments

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Data Sheet

0-1: $0.22
1-25: $0.12
25-100: $0.10
100-250: $0.07
Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
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